(A) Field of the Invention
The present invention relates to a recessed gate structure and method for preparing the same, and more particularly, to a recessed gate structure having an increased channel length by forming a multi-step structure in a recess and method for preparing the same.
(B) Description of the Related Art
FIG. 1 illustrates a metal-oxide-semiconductor field effect transistor (MOSFET) 10 according to the prior art. The transistor 10 is an important basic electronic device including a semiconductor substrate 12, a gate oxide layer 14, a conductive metal layer 16 and two doped regions 18 serving as the source and the drain in the semiconductor substrate 12. The transistor 10 may further include a nitride spacer 22 positioned on the sidewall of the conductive metal layer 16 for isolating the conductive metal layer 16 from the other electronic device on the semiconductor substrate 12.
As semiconductor fabrication technology continues to improve, sizes of electronic devices are reduced, and the size and the channel length of the transistor 10 also decrease correspondingly. The transistor 10 in FIG. 1 has been widely used in the integrated circuit; however, the continuous decreasing of the size and the channel length of the transistor 10 results in a serious interaction between the two doped regions 18 and a carrier channel 24 under the gate oxide layer 14 such that controlling ability of the conductive metal layer 16 on the switching operation of the carrier channel 24 is reduced, i.e., causes the so-called short channel effect, which impedes the functioning of the transistor 10.